Cache caching. What is cached data on the phone? Using WordPress Caching Plugins

The computer, alas, does not immediately execute the commands it receives from people. To speed up this process, a number of tricks are used, and caching takes pride of place among them. What it is? What is cached data? How does this process actually happen? What is cached data in a Samsung smartphone, for example, and is it different in any way from that on a computer? Let's get started getting answers to these questions.

This is the name of the intermediate buffer, which provides quick access to information that is most likely to be requested. All data is contained in it. An important advantage is that you can retrieve all the necessary information from the cache much faster than from the original storage. But there is a significant drawback - size. Cached data is used in browsers, hard drives, CPUs, web servers, WINS and DNS services. The basis of the structure are recordsets. Each of them is associated with a specific element or block of data, which acts as a copy of what is in the main memory. Records have an identifier (tag), which is used to determine the match. Let's look from a slightly different point of view: what is cached data in a Samsung or other manufacturer's phone? Are they different from those created on a computer? From a fundamental point of view - no, the difference is solely in size.

Process of use

When a client (they were listed above) requests data, the first thing the computer does is examine the cache. If it contains the required entry, then it is used. In these cases, a hit occurs. Periodically, data from the cache is copied to main memory. But if the required record was not found, then the contents are searched in the underlying storage. All information taken is transferred to the cache so that it can later be accessed more quickly. The percentage that queries are successful is called the hit rate or hit rate.

Data Update

When used, say, a web browser checks the local cache to find a copy of the page. Given the limited nature of the data, in case of a miss, a decision is made to discard part of the information in order to free up space. To decide what exactly will be replaced, various eviction algorithms are used. By the way, if we talk about what cached data is on Android, then for the most part they are used to work with pictures and application data.

Recording Policy

When the contents of the cache are modified, the data in the main memory is also updated. The time delay that elapses between entering information depends on the recording policy. There are two main types:

  1. Immediate recording. Each change is synchronously written to main memory.
  2. Delayed or reverse recording. Data is updated periodically or upon request from the client. To track whether a change has been made, use a sign with two states: “dirty” or changed. In the event of a miss, two accesses can be made to main memory: the first is used to write the data that was modified from the cache, and the second is used to read the required element.

It may also be that the information in the intermediate buffer becomes irrelevant. This occurs when data in main memory changes without making adjustments to the cache. To ensure consistency across all editing processes, coherence protocols are used.

Modern challenges

With an increase in the frequency of processors and an increase in the performance of RAM, a new problem area has appeared - the limitations of the interface. What can a knowledgeable person notice from this? Cache memory is very useful if the frequency in the RAM is lower than in the processor. Many of them have their own intermediate buffer to reduce access time to RAM, which is slower than registers. CPUs that support virtual addressing often include a small but very fast address translation buffer. But in other cases, the cache is not very useful, and sometimes only creates problems (but this is usually in computers that have been modified by a non-professional). By the way, speaking about what cached data is in the memory of a smartphone, it should be noted that due to the small size of the device, it is necessary to create new miniature cache implementations. Nowadays, some phones boast parameters similar to those of advanced computers ten years ago - and what a difference their size makes!

Synchronizing data between different buffers

  1. Inclusive. The cache can behave in any way.
  2. Exclusive. Developed for each specific case.
  3. Non-exclusive. Widespread standard.

Caching levels

Their number is usually three or four. The higher the memory level, the larger and slower it is:

  1. L1 cache. The fastest cache level is the first one. In fact, it is part of the processor, since it is located on one chip and belongs to functional blocks. Typically divided into two types: instruction cache and data cache. Most modern processors do not work without this level. This cache operates at the processor frequency, so it can be accessed every clock cycle.
  2. L2 cache. Usually located together with the previous one. It is a shared memory. To find out its value, you need to divide the entire volume allocated for data caching by the number of cores that the processor has.
  3. L3 cache. Slow, but the largest dependent cache. Usually more than 24 MB. Used to synchronize data that comes from various second level caches.
  4. L4 cache. Use is justified only for high-performance multiprocessor mainframes and servers. It is sold as a separate chip. If you are asking a question about what data caching is in a Samsung smartphone and are looking for this level in it, I can say that we were definitely 5 years too hasty.

Cache associativity

This is a fundamental characteristic. The associativity of cached data is necessary to display logical segmentation. It, in turn, is needed due to the fact that sequential enumeration of all available lines takes dozens of clock cycles and negates all advantages. Therefore, a rigid binding of RAM cells to cache data is used to reduce search time. If we compare intermediate buffers that have the same volume, but different associativity, then the one with the larger one will work less quickly, but with significant specific efficiency.

Conclusion

As you can see, cached data allows your computer to act more quickly under certain conditions. But, alas, there are still quite a lot of aspects that can be worked on for a long time.

Cache operation scheme

A cache is a specially allocated small area of ​​memory with a larger exchange rate data than the traditional one. He exists in view inconsistencies between the computing power of processors and the speed of reading information from standard memory storage devices.

Progress required increasing volumes for data storage, while their processing speed has lagged since the dawn of computers. It is because of this that such a “bridge” was developed. The process of entering information into the cache memory is called " caching" Actually, that’s why it’s important to do it in a timely manner. cleanse– to maintain reading efficiency.

Caching in browsers


Browser caching algorithm

Often, when talking about caching, many people remember cache-files in browsers. And it’s not surprising, since cleaning them is one of the main tips that users are given when errors occur.

Are accumulating they, along with the number of sites viewed - from them, part of the information is loaded into the cache memory, thereby two goals: speed up total loading time and decrease load on network traffic. When you re-enter the site, it happens examination on the relevance of data between the server and client. It is up to the creator of the web page to decide what should be saved and what not.

Cache in Windows

On Windows operating systems, cache files take up a fair amount of space. Are saved various temporary files created after running or changing a program, preview images and musical compositions, restore points OS.

Controls this process, the so-called cash manager, which periodically gets rid of from irrelevant resources. Moreover, it is precisely this frequency that is the key factor. effective work: if files are deleted too often, the system will waste time reading them again, and if too rarely, there will simply be no room left for new information.

Cache on Android

On smartphones with the Android operating system, the situation looks similar, with one significant “but” - the amount of memory provided much lower than on a personal computer. In addition, after launching programs, they are stored in a tray list, from where they can then be re-installed. expand, with all saved changes made in the last session.

Unfortunately, the OS does not do a very good job of cleaning up unnecessary files, which is why applications may not work if used for a long time. incorrect, and the performance of the phone itself is significantly will decrease. To prevent this, it is recommended to use third-party programs, which perform cleaning, for example, Clean Master.

This term has other meanings, see Cache (meanings).

Cache or cache(English) cache, from fr. cacher- "hide"; pronounced “cache”) is a fast-access intermediate buffer containing information that is most likely to be requested. Accessing data in a cache is faster than retrieving source data from slower memory or a remote source, but its capacity is significantly limited compared to source data storage.

Story

The word "cache" was first used in a computer context in 1967 while preparing an article for publication in the IBM Systems Journal. The article concerned memory improvements in the developed model 85 of the IBM System/360 series. The magazine's editor, Lyle Johnson, asked for a more descriptive term than "high-speed buffer", but due to a lack of ideas, he himself suggested the word "cache". The paper was published in early 1968, the authors were awarded an IBM award, their work was widely disseminated and subsequently improved, and the word "cache" soon became a common term in computer literature.

Operation

Mapping the CPU memory cache to main memory.

A cache is a memory with a faster access speed, designed to speed up access to data contained permanently in memory with a slower access speed (hereinafter referred to as “main memory”). Caching is used by CPUs, hard drives, browsers, web servers, DNS and WINS services.

A cache consists of a set of entries. Each record is associated with a data element or data block (a small piece of data), which is a copy of the data element in main memory. Each entry has an identifier, often called a tag, that identifies the correspondence between the data items in the cache and their copies in main memory.

When a cache client (CPU, web browser, operating system) accesses data, the cache is examined first. If an entry with an identifier matching the identifier of the requested data item is found in the cache, then the data items in the cache are used. This case is called cache hit. If an entry containing the requested data element is not found in the cache, it is read from main memory into the cache and becomes available for subsequent access. This case is called cache miss. The percentage of cache accesses when a result is found in it is called hit rate, or hit rate to cache.

For example, a web browser checks its local disk cache to see if there is a local copy of the web page that matches the requested URL. In this example, the URL is the identifier and the content of the web page is the data elements.

If the cache is limited in size, then if there is a miss, a decision may be made to discard some entry to free up space. Different eviction algorithms are used to select which record to discard.

When data items in the cache are modified, they are updated in main memory. The time delay between modification of data in the cache and updating of main memory is controlled by the so-called write policy.

In cache with immediate recording each change causes a synchronous update of data in main memory.

In cache with delayed recording(or write back) update occurs when a data element is evicted, periodically or at the request of the client. To keep track of modified data items, cache entries store a modification flag ( changed or "filthy"). A write-back cache miss may require two accesses to main memory: the first to write the data to be replaced from the cache, and the second to read the desired data item.

If data in main memory can be changed independently of the cache, then the cache entry may become irrelevant. Protocols for communication between caches that maintain data consistency are called cache coherency protocols.

Hardware implementation

CPU cache

Main article: CPU cache

Due to the increase in the frequency at which processors operate and the increase in the performance of the random access memory (RAM) subsystem, the data transfer interface has become the bottleneck of the computing system.

Cache memory can provide significant performance benefits when the RAM clock speed is significantly lower than the processor clock speed. Some processor models have their own cache to minimize access time to random access memory (RAM), which is slower than registers (these registers and I/O buffers can be considered a level-0 cache). The clock speed for cache memory is usually not much less than the CPU speed.

Processors that support virtual addressing often include a small, high-speed translation buffer (TLB). Its speed is important because it is polled on every memory access.

The problem of synchronization between different caches (both one and multiple processors) is solved by cache coherence.

There are three options for exchanging information between caches of different levels, or, as they say, cache architectures: inclusive, exclusive and non-exclusive.

Exclusive cache memory assumes the uniqueness of information located in different cache levels (preferred by AMD).

In a non-exclusive cache, they can behave as they please.

Cache levels

The CPU cache is divided into several levels. The maximum number of caches is four. In a universal processor, the number of levels can currently reach three. Level N+1 caches are typically larger in size and slower in access and data transfer speeds than Level N caches.

  • The fastest is the first level cache - L1 cache (level 1 cache). In fact, it is an integral part of the processor, since it is located on the same chip and is part of the functional blocks. In modern processors, L1 is usually divided into two caches - the instruction cache and the data cache (Harvard architecture). Most processors without L1 cannot function. L1 operates at the processor frequency, and, in general, it can be accessed every clock cycle. It is often possible to perform multiple read/write operations simultaneously.
  • The second fastest is the second level cache - L2 cache, which, like L1, is usually located on the same chip with the processor. In early versions of processors, L2 is implemented as a separate set of memory chips on the motherboard. L2 volume from 128 KB to 1−12 MB. In modern multi-core processors, the second level cache, located on the same chip, is a separate memory - with a total cache size of n MB, each core has n/c MB, where c is the number of processor cores.
  • The third level cache is the least fast, but it can be very large - more than 24 MB. L3 is slower than previous caches, but still significantly faster than RAM. In multiprocessor systems it is in common use and is intended for synchronizing data from different L2s.
  • There is a fourth cache level, the use of which is justified only for multiprocessor high-performance servers and mainframes. Typically it is implemented on a separate chip.

Cache associativity

One of the fundamental characteristics of cache memory - the level of associativity - reflects its logical segmentation, which is caused by the fact that sequential search of all cache lines in search of the necessary data would require dozens of clock cycles and would negate all the gains from using the memory built into the CPU. Therefore, RAM cells are tightly bound to cache lines (each line can contain data from a fixed set of addresses), which significantly reduces search time.

With the same cache size, the scheme with greater associativity will be the least fast, but the most efficient (after a four-thread implementation, the increase in “specific efficiency” per thread increases little).

Caching external drives

Many peripheral storage devices use internal cache to speed up operation, in particular, hard drives use cache memory from 1 to 64 MB (models with NCQ/TCQ support use it for storing and processing queries), CD/DVD/BD readers disks also cache read information to speed up re-access.

The operating system also uses part of the RAM as a cache for disk operations (for example, for external devices that do not have their own cache, including hard drives, flash memory, and floppy disks). Often, all free (not allocated to processes) RAM is provided for hard drive caching.

The use of external drive caching is due to the following factors:

  1. The processor access speed to RAM is hundreds or more times faster than to the memory of external storage devices;
  2. The performance of disk storage devices (hard, floppy, optical disks) is maximum when reading and writing several sequential blocks and decreases significantly with single requests to different places on the disk, which is due to the inertia of the mechanical head drive.
  3. extremely uneven frequency of access to different memory blocks of external drives:
    1. use of part of blocks by several processes simultaneously, for reading and writing (for example, in databases)
    2. very frequent reading of part of the blocks (index files, directories in the file system)
    3. very frequent recording of some blocks (log files, journals, databases; file system metadata).

When read, the cache allows you to read a block once, then store one copy of the block in RAM for all processes, and return the contents of the block "instantly" (compared to a disk request). There is a “pre-query” technique - in the background, the operating system also reads the next few blocks (after the required one) into the cache.

When writing, the cache allows you to group short writes into larger ones, which are more efficiently processed by drives, or to avoid recording intermediate modifications. In this case, all intermediate states of the block are visible to processes from RAM.

Caching external storage devices significantly improves system performance by optimizing I/O usage. The advantage of the technology is transparent (invisible to programs) automatic optimization of the use of memory and disks while the logic of applications working with files remains unchanged.

The disadvantage of write caching is the time lag between a program's write request and the block actually being written to disk, as well as changes in the order in which writes are executed, which can lead to information loss or inconsistency of structures if a power failure or system hangs. This problem is mitigated by forced periodic synchronization (writing changed cache lines) and journaling of file systems.

Software implementation

Write Caching Policy

When reading data, cache memory provides a clear performance gain. When recording data, gains can only be achieved at the cost of reduced reliability. Therefore, different applications may choose one or another cache write policy.

There are two main cache write policies - write-through and write-back:

  1. Write-through - writes are made directly to main memory (and duplicated into the cache), that is, the write is not cached.
  2. Lazy write - data is written to the cache. Writing to the main memory is performed later (during displacement or after time has elapsed), grouping several write operations into adjacent cells in one operation. Writeback technology makes the data in the main memory irrelevant for some time; these irrelevances are not noticeable to the CPU itself, but before accessing the memory of another system bus master (DMA controller, bus-master PCI bus device), the cache must be written to memory forcibly. When using writeback in a multiprocessor system, the caches of different CPUs must be coherent (or the processors must share the same cache).

Write-back cache algorithm

Initially, all buffer headers are placed in the free buffer list. If a process intends to read or modify a block, it performs the following algorithm:

  1. tries to find the buffer header with the given number in the hash table;
  2. if the received buffer is busy, waits for it to be released;
  3. if the buffer is not found in the hash table, takes the first buffer from the tail of the free list;
  4. if the list of free buffers is empty, then the eviction algorithm is executed (see below);
  5. if the received buffer is marked as “dirty”, it performs asynchronous writing of the buffer’s contents to external memory.
  6. removes a buffer from the hash table if it was placed in it;
  7. places the buffer in the hash table with a new number.

The process reads data into the received buffer and frees it. When modified, the process marks the buffer as dirty before releasing it. When freed, the buffer is placed at the head of the free buffer list.

Thus:

  1. if a process has read a certain block into a buffer, then there is a high probability that another process, when reading this block, will find the buffer in RAM;
  2. Data is written to external memory only when there are not enough “clean” buffers, or upon request.

Preemption algorithm

Main article: Caching algorithms

If the list of free buffers is empty, then the buffer eviction algorithm is executed. The eviction algorithm has a significant impact on cache performance. The following algorithms exist:

  1. LRU (English) Least Recently Used) - the buffer that has been unused for the longest time is evicted;
  2. MRU (English) Most Recently Used) - the last used buffer is replaced;
  3. LFU ( English) (English) Least Frequently Used) - the buffer used least often is evicted;
  4. ARC ( English) (English) Adaptive Replacement Cache) is a preemption algorithm combining LRU and LFU, patented by IBM.

The use of a particular algorithm depends on the data caching strategy. LRU is most effective if the data is guaranteed to be reused as soon as possible. MRU is most effective if the data is guaranteed not to be reused in the near future. If an application explicitly specifies a caching strategy for a certain set of data, then the cache will function most efficiently.

Operating system caching

The RAM cache consists of the following elements:

  1. a set of RAM pages divided into buffers equal in length to the data block of the corresponding external memory device;
  2. a set of buffer headers describing the state of the corresponding buffer;
  3. a hash table containing the correspondence between the block number and the header;
  4. lists of free buffers.

Caching Internet pages

In the process of transmitting information over the network, caching of Internet pages can be used - the process of storing frequently requested documents on (intermediate) proxy servers or the user's machine, in order to prevent their constant downloading from the source server and reduce traffic. In this way, information moves closer to the user. Caching is controlled using HTTP headers.

Alternatively, caching of web pages can be carried out using the CMS of a specific site to reduce the load on the server during high traffic. Caching can be done both in memory and in the file cache. The disadvantage of caching is that changes made in one browser may not be immediately reflected in another browser that retrieves the data from the cache.

Caching work results

Many programs write intermediate or auxiliary results of work somewhere so as not to calculate them every time they are needed. This speeds up work, but requires additional memory (RAM or disk). An example of such caching is database indexing.

What is cache memory? What is cache for Android

This article will tell you what a cache is and what types there are. This question is often asked by computer users who do not fully understand the meaning of this term. There are several types of cache memory available on different devices. It is an integral part of the computer and is simply necessary for it to work properly. The article will describe the differences in detail and talk about when the cache should be cleared and what it will lead to.

What is cache memory?

A cache is a section of memory taken from the hard drive that stores information that is most often needed by the processor of your device. It helps simplify the processor's work in cases where it needs to spend a long time searching or loading information. Simply put, this is information that is stored very close to the processor itself. That is, the device stores information or commands that are used most often in storage, this allows the device to quickly find the required material. The cache may vary. Let's say there is a cache on a computer, browser, or smartphone. Most often, the device places processed information in this memory area so as not to process it again and not waste extra time. What cache memory is is now clear. Let's see where it is used.

What is a computer cache?

The computer has RAM, which it uses to optimize its performance. Cache memory in a computer is a buffer between the processor and RAM. It is located close to the processor itself, so it is faster for it to use the information stored in it rather than get to the operational one.

Example of work

You can give an example of how cache memory works to properly understand its essence. A person needs to find out phone numbers that he does not remember. Finding telephone numbers in a directory will be equivalent to the processor searching for information in RAM. If these phone numbers are written down on a separate sheet, a person will be able to quickly find them out without searching in a directory. This piece of paper is an example of cache memory. The computer automatically uploads information there that can often be useful. This, of course, greatly optimizes the operation of the computer, thereby increasing its performance.

Browser cache

The browser also uses cache memory. He uploads information, pictures, sounds and more there. This can be seen in the way your browser opens a site you visit often faster than the one you visited for the first time. This happens because the browser “understands” that this site is often visited by you, and in order not to download information from it each time and waste time on it, it saves it in cache memory to optimize the work and save time . The browser uses hard drive space for this temporary storage. The browser cache size can be adjusted in the browser itself. But it is worth remembering that if it fills the entire space with information, then new information will be loaded there by displacing the old one, which is not used. You can easily clear your browser cache if you don't think you need it.

Cache for games on Android

Users of Android smartphones often wonder what cache is for Android. Most often it is required for games with 3D graphics, which require more space for additional materials. Sometimes for games it downloads itself when you enter the game. Using the Internet, the game independently downloads the information it requires and places it in storage. But sometimes it happens that the cache for a game needs to be placed in storage yourself. You can do this by following the instructions for installing the game. Most often, a game with a cache is installed as follows. The installation file is placed anywhere on your device, because this file just needs to be installed. The cache, in turn, must be placed in a specially designated place on your smartphone so that when the game starts, it begins to read information from the right place. If the cache is located where it is needed, the game will function smoothly. The place where you need to copy it is indicated in the game description.

What does "clear cache" mean?

Not many people know what “clear cache” is. This means deleting all the accumulated information on your device that is necessary to optimize the operation of your computer. This should only be done if absolutely necessary. Let's say that after deleting the browser cache, sites that you constantly use will take a little longer to load. After all, he will need to re-download all the information on the site. After deleting the cache on your smartphone, games that require it will not be able to launch without these materials.

A person must understand what clearing the cache means and know what it can lead to. Of course, sometimes situations arise when it is necessary to clean it. This may be due to memory overflow or problems that it can lead to. Sometimes it happens that the cache can interfere with the operation of the computer. This needs to be monitored. CCleaner can find caches on your system that you don't need and remove them. This program greatly helps optimize your computer's performance. It can check your computer for errors, clean the system registry, and also set programs to autoload when the computer starts. This can also be called an important function. After all, often the programs that we download from the Internet are automatically downloaded when Windows starts. If a large number of such programs are loaded when the computer starts, it may take a long time to turn on. The CCleaner program can easily fix this; you can set the autorun programs that you need and which you do not need when starting the system. When you already know what clearing the cache is, you need to find out in detail the reasons why you need to do it.

Why clear the cache?

One of the reasons why this memory needs to be cleared is due to free disk space. This is especially true for people who have multiple browsers. Each browser will take up space from your hard drive for its own personal cache, which can have a significant impact on memory. It also saves the design of sites. Let's say if you visited the site, your browser will save its design. And after the new design is released, you will not be able to see it, since you will be shown the design saved in your cache. In addition, it also saves your browsing history. If you don't want anyone to be able to view the sites you visit, you can also clear it. Deleting excess cache from your smartphone will also be useful. Often games leave it when deleted. Therefore, there may be a cache of a game on your phone that is no longer on the computer, and this will take up quite a lot of memory. Considering that a smartphone does not have as much memory as a computer, this plays a big role. We hope this article gave you a general understanding and helped answer the question of what a cache is.

$. Caching Tools

This chapter begins with a discussion of what modern microprocessor caching features are. Next, we consider various schemes for constructing data caches, TLB and VHPT tables. Finally, we look at caching management tools.

$.1 Caching tools for modern microprocessors

The translated word cache(cache) means “wallet”, “secret warehouse”, “cache” (“stash”). The mystery characteristic stems from the fact that all caching facilities are transparent to the program - the program does not see whether information passes through them or not. Caching facilities include: up to three levels of instruction and data cache (L1Cache, L2Cache and L3Cache), trace cache ( TC–TraceCache), associative translation buffers ( TLB–TranslationLook-asideBuffer) paging block, virtual page hash table ( VHPT–VirtualHashPageTable) and write buffers.

The program is an information consumer

Main memory is not fast, but it is cheap

Fig.$.0. The place of caching tools in the information processing procedure.

Caching tools are an additional high-speed storage of copies of blocks of information from the main memory, the probability of which will be accessed in the near future is high (Fig.$.0). They do not add addressable memory space, the program cannot access them explicitly, but the operating system has tools for managing caching facilities.

$.1. Memory Caching Principles

In computers, main memory is implemented on relatively slow dynamic memory (DRAM), accessing it leads to processor downtime - wait states appear. Static memory (SRAM), built, like a processor, on transistor cells, by its nature is capable of catching up with modern processors in performance and making wait cycles unnecessary (or at least reducing their number). In addition, access to main memory (located outside the processor) occurs through the system bus, the speed capabilities of which are significantly limited. There are other limitations that prevent all memory from being made fast:

    the faster the memory, the more expensive it is (and the dependence is exponential),

    the faster the memory, the more heat it generates, which means it should be equipped with special means of heat removal and placed away from the microprocessor, which heats up during operation,

    The faster the communication bus operates, the shorter it should be (due to mutual interference and due to the limited speed of light).

A reasonable compromise for building economical and productive systems was a hierarchical method of organizing RAM. The idea is the following combination:

    Large main memory is relatively slow and is connected to the processor via a relatively slow shared bus,

    external third-level cache (L3) is significantly smaller, but works faster and is connected to the processor by a faster bus,

    located inside the processor, the second level cache (L2), it is even smaller, but operates almost at the processor frequency and is fast enough,

    A fast, small Level 1 (L1) cache that is tightly integrated into the processor.

The cache cannot store a copy of the entire main memory because its size is many times smaller than the main memory. It stores only a limited number of data blocks and catalog(cachedirectory) – a list of their current correspondence to main memory areas. In addition, not all memory available to the processor may be cached (either because the cache of a given level is built this way, or because it is set so by the operating system).

On each memory access, the directory cache controller checks to see if there is a valid copy of the requested data in the cache. If she is there, then this is the case cache hits(cachehit), and the data is taken from the cache memory. If there is no valid copy there, this is the case cache miss(cachemiss), and the data is taken from main memory. According to the caching algorithm, a block of data read from main memory will, under certain conditions, replace one of the cache blocks. The percentage of hits and, consequently, the efficiency of caching depends on the intelligence of the replacement algorithm. The search for a block in the list must be done quickly enough so that “thoughtfulness” in making a decision does not negate the gain from the use of high-speed memory. Access to main memory can begin simultaneously with a search in the directory, and in case of a hit, it can be interrupted (Look-aside architecture). This saves time, but unnecessary access to main memory leads to increased power consumption. Another option: access to external memory begins only after a miss is detected (LookThrough architecture), in which case at least one processor cycle is lost, but energy is saved.

In modern computers, the cache is usually built according to a two-level scheme. Level 1 cache (L1Cache) is built into all 486+ processors; This is the internal cache. The size of this cache is small (8-32 KB). To improve performance, a separate cache is often used for data and instructions (the so-called Harvard architecture - the opposite of the Princeton architecture, which uses shared memory for instructions and data). The second level cache (L2Cache) for 486 and Pentium processors is external (installed on the motherboard), while for P6+ it is located in the same package with the core and is connected to a special internal processor bus.

The cache controller must ensure coherency - consistency of cache memory data of both levels with data in main memory, provided that this data can be accessed not only by the processor, but also by other active (busmaster) adapters connected to the buses (PCI, VLB, ISA, etc.). It should also be taken into account that there may be several processors, and each may have its own internal cache.

The cache controller operates on cachelines of a fixed length. A string can store a copy of a block of main memory, the size of which naturally matches the length of the string. Each cache line is associated with information about the address of the main memory block copied to it and its state. The line could be valid(valid) - this means that at the current moment in time it reliably reflects the corresponding block of main memory, or invalid. Information about which block occupies a given line (i.e., the leading part of the address or page number), and its state is called tag(tag) and is stored in a special cell associated with this row tag memory(tagRAM). In exchange operations with the main memory, the entire line is usually involved (unsectored cache); for processors 486 and higher, the length of the line coincides with the amount of data transferred in one packet cycle (for 486 it is 4x4 = 16 bytes, for Pentium it is 4x8 = 32 bytes). A sectored cache option is also possible, in which one line contains several adjacent cells - sectors, the size of which corresponds to the minimum portion of cache data exchange with main memory. In this case, the directory entry corresponding to each row must store the validity bits for each sector of this row. Sectoring saves the memory required to store a directory as the cache size increases, because more directory bits are allocated to the tag, and it is more profitable to use additional validity bits than to increase the index depth (number of elements) of the directory.

Cache lines for displaying a memory block are allocated when read operations fail; in P6, lines are filled during writes. A block that does not have a copy in the cache is written to main memory (to improve performance, writing can be done through a deferred write buffer). Cache controller behavior during a memory write operation when a copy of the requested area is in some cache line , determined by its algorithm, or write policy (WritePolicy). There are two main policies for writing data from the cache to main memory: write-through W.T.(WriteThrough) and reverse (delayed) write W.B.(WriteBack).

WT Policy provides for the simultaneous execution of every write operation (even a single-byte one) that hits the cached block, the cache line, and main memory. In this case, the processor will have to perform a relatively long write to main memory for each write operation. The algorithm is quite simple to implement and easily ensures data integrity due to the constant coincidence of data copies in the cache and main memory. For it, there is no need to store signs of presence and modification - only tag information is sufficient (it is assumed that any line always reflects a block, and which one is indicated by the tag). But this simplicity results in low recording efficiency. There are variants of this algorithm using lazy buffered writing, in which data is written to main memory through a FIFO buffer during free bus clock cycles.

WB Policy allows you to reduce the number of writes on the main memory bus. If the memory block to be written to is cache mapped, then the physical write will first be made to that valid cache line, which is marked as dirty(dirty), or modified, that is, requiring unloading into main memory. Only after this unloading (writing to main memory) will the line become clean(clean), and it can be used to cache other blocks without losing data integrity. Data is rewritten to main memory only as a whole line. This unloading by the controller can be postponed until absolutely necessary (access to cached memory by another subscriber, replacement in the cache with new data) or performed in free time after modifying the entire line. This algorithm is more difficult to implement, but significantly more efficient than WT. Motherboard support for write-back caching requires processing additional interface signals to dump modified rows into main memory if this area is accessed by bus controllers such as other processors, graphics adapters, disk controllers, network adapters, etc.

Depending on the method of determining the mutual correspondence between a cache line and a region of main memory, three cache memory architectures are distinguished: direct map cache(direct-mappedcache), fully associative cache(fullyassociativecache) and their combination – set-associative cache(set-associativecache).

What does cached mean?

what does cached mean? 1700MB cached (shows in task manager) is that a lot? few? Badly? Fine? On the computer it costs 4 GB if that happens. explain more simply if possible))

Sergey Smankov

In this case, this is the amount of RAM that is located in the swap file. This is not bad, but data exchange from the hard drive is slower than from physical memory.
Try completely disabling the paging file, see if it works faster. But if you disable it, you risk not being able to play some games, then you can simply return it as it was.

Serafim benzak

Of course. Free memory is completely useless. Hence the general rule: the less free memory, the better. Think for yourself. If memory is free, it means it is not being used. And there is no use for something that is not used. Therefore, any normal operating system tries not to leave free memory. No matter how much there is (even a terabyte), it will all be used over time. At the same time, currently executing processes can occupy only a small part of this memory. For most processes, the amount they occupy does not depend at all on the amount of RAM, but some, such as browsers, when running on systems with large amounts of memory, request memory from the system with a reserve. To be able to store more open pages and multimedia data in RAM.
Naturally, the question arises: where does the system distribute the rest of the memory? The answer is simple. For buffers and caches (the misspelling of “buffer” is common).
What are buffers for? To speed up write operations (usually to disk). If you give a command to copy a file, it is read and placed in the write-back buffer. And you are informed that the command has been completed (although in fact nothing has been written yet) and you can continue working. At a certain frequency, which is 10 seconds by default in Linux, although you can set any, buffers are flushed to disk.
Or buffers are flushed earlier, when they reach a certain size. This is also understandable. Let's say you have two HDDs and you want to move a HUGE file from the first to the second.
Reading is traditionally a faster operation than writing, so if you have an infinite buffer, the file will be read into it long before the contents of the buffer are written to the second disk.
The program, having received a message from the operating system about the successful copying of the file (which is issued after the file has been read into the buffer), with a clear conscience deletes the original, which is no longer needed, since you have a copy. And at this moment the electrician pulls the switch....
So, to minimize possible losses, buffer sizes are limited.
How to use the remaining memory? Yes, very simple! The moment you read a file from disk, a copy of it is stored in cache memory. Therefore, re-reading the same file is instantaneous.
Little of. If the operating system supports the "execute in place" technology, when you start a program for execution, you do not need to waste time copying commands and process data into RAM. Control is transferred directly to the file on disk. Without reading it into RAM. Indeed, why do the same job twice? After all, when accessing a file, it will end up in the cache in any case. And the cache is RAM.
How much size does the operating system allocate for cache? The answer is simple: everything he finds.
If a process needs memory, the system will simply give it a piece of memory occupied by the cache. This operation is performed extremely quickly, but, nevertheless, the operating system takes into account that there may be programs that will require memory from it tens of thousands of times per second. It is clear that only very small volumes can be requested in this way. Even if you ask for, say, just one megabyte, over ten thousand requests the volume will grow to values ​​greater than the amount of physically installed RAM on most home computers.
Therefore, to satisfy such (frequent, but small) requests, it is enough to reserve a couple of percent of RAM and no more.

What does cached mean?

kind soul

Cached - the amount of RAM that is not used by running programs, occupied by cached data from the disk. This speeds up the process of launching programs and opening documents. This memory is freed when needed.
A cache is a storage area containing data that is most frequently used in work. The cache can be on the hard drive, the processor, or the browser. For comparison: when I'm going to repair a board, I put a soldering iron, a screwdriver and tweezers next to me, on the mat on the right, because I know that they are needed first. The rest of the tools are on the floor in a box. I take them out as needed. So my rug on the right is the CACHE. The system also knows which files or data it will need first and places them in the cache when loading.

If a smartphone or tablet runs out of free space, the first thing the user is recommended to do is delete the cache from the memory. What exactly is a cache on a phone or cached data?

A cache is a fast-access intermediate buffer containing information that can be queried. At the same time, accessing the cache is much faster than retrieving the necessary data from memory or a remote source. However, you need to remember that the cache size is limited.

If you don’t understand anything from the above, let’s try to explain it visually. When you install an application on your Android device, a folder is created to store user settings, various images, logs, etc. Of course, the data in the cache in this case takes up space.

Another example. Let's say you open VKontakte on your phone and look at photos. These photos are saved to your device (that is, cached). For what? And then, the next time you access the same images, they will be loaded much faster than without using the cache. The same applies not only to photos, but also to music and even videos - they are all saved on the device and can take up a lot of space.

The question is: will you revisit the video you watched? Most likely not, and therefore there is no need to cache the video.

What happens if you delete the cache?

Nothing will happen if we talk about the cache in browsers, except that some information, such as photographs, will take a little longer to load. If you delete the application cache, you also don’t need to worry, because the saves are not deleted.

The cache can be deleted either manually or using third-party applications. It is better to use the second method, since when deleting the cache manually, you will have to delete it from different sources, while the application itself will find all types of cache in the device and delete them at the user’s request.

Here is the application cache data in the smartphone settings:

And this is cache data for one application.

Computers

What is cached data and caching?

March 10, 2016

The computer, alas, does not immediately execute the commands it receives from people. To speed up this process, a number of tricks are used, and caching takes pride of place among them. What it is? What is cached data? How does this process actually happen? What is cached data in a Samsung smartphone, for example, and is it different in any way from that on a computer? Let's get started getting answers to these questions.

What is cache?

This is the name of the intermediate buffer, which provides quick access to information that is most likely to be requested. All data is contained in it. An important advantage is that you can retrieve all the necessary information from the cache much faster than from the original storage. But there is a significant drawback - size. Cached data is used in browsers, hard drives, CPUs, web servers, WINS and DNS services. The basis of the structure are recordsets. Each of them is associated with a specific element or block of data, which acts as a copy of what is in the main memory. Records have an identifier (tag), which is used to determine the match. Let's look from a slightly different point of view: what is cached data in a Samsung or other manufacturer's phone? Are they different from those created on a computer? From a fundamental point of view - no, the difference is solely in size.

Process of use

When a client (they were listed above) requests data, the first thing the computer does is examine the cache. If it contains the required entry, then it is used. In these cases, a hit occurs. Periodically, data from the cache is copied to main memory. But if the required record was not found, then the contents are searched in the underlying storage. All information taken is transferred to the cache so that it can later be accessed more quickly. The percentage that queries are successful is called the hit rate or hit rate.

Data Update

When used, say, a web browser checks the local cache to find a copy of the page. Given the limitations of this type of memory, if there is a mistake, a decision is made to discard some of the information in order to free up space. To decide what exactly will be replaced, various eviction algorithms are used. By the way, if we talk about what cached data is on Android, then for the most part they are used to work with pictures and application data.

Recording Policy

When the contents of the cache are modified, the data in the main memory is also updated. The time delay that elapses between entering information depends on the recording policy. There are two main types:

  1. Immediate recording. Each change is synchronously written to main memory.
  2. Delayed or reverse recording. Data is updated periodically or upon request from the client. To track whether a change has been made, use a sign with two states: “dirty” or changed. In the event of a miss, two accesses can be made to main memory: the first is used to write the data that was modified from the cache, and the second is used to read the required element.

It may also be that the information in the intermediate buffer becomes irrelevant. This occurs when data in main memory changes without making adjustments to the cache. To ensure consistency across all editing processes, coherence protocols are used.

Modern challenges

With an increase in the frequency of processors and an increase in RAM performance, a new problem area has appeared - the limitations of the data transfer interface. What can a knowledgeable person notice from this? Cache memory is very useful if the frequency in the RAM is lower than in the processor. Many of them have their own intermediate buffer to reduce access time to RAM, which is slower than registers. CPUs that support virtual addressing often include a small but very fast address translation buffer. But in other cases, the cache is not very useful, and sometimes only creates problems (but this is usually in computers that have been modified by a non-professional). By the way, speaking about what cached data in a smartphone’s memory is, it should be noted that due to the small size of the device, new miniature cache implementations have to be created. Nowadays, some phones boast parameters similar to those of advanced computers ten years ago - and what a difference their size makes!

Synchronizing data between different buffers

  1. Inclusive. The cache can behave in any way.
  2. Exclusive. Developed for each specific case.
  3. Non-exclusive. Widespread standard.

Caching levels

Their number is usually three or four. The higher the memory level, the larger and slower it is:

  1. L1 cache. The fastest cache level is the first one. In fact, it is part of the processor, since it is located on one chip and belongs to functional blocks. Typically divided into two types: instruction cache and data cache. Most modern processors do not work without this level. This cache operates at the processor frequency, so it can be accessed every clock cycle.
  2. L2 cache. Usually located together with the previous one. It is a shared memory. To find out its value, you need to divide the entire volume allocated for data caching by the number of cores that the processor has.
  3. L3 cache. Slow, but the largest dependent cache. Usually more than 24 MB. Used to synchronize data that comes from various second level caches.
  4. L4 cache. Use is justified only for high-performance multiprocessor mainframes and servers. It is sold as a separate chip. If you are asking a question about what data caching is in a Samsung smartphone and are looking for this level in it, I can say that we were definitely 5 years too hasty.

Cache associativity

This is a fundamental characteristic. The associativity of cached data is necessary to display logical segmentation. It, in turn, is needed due to the fact that sequential enumeration of all available lines takes dozens of clock cycles and negates all advantages. Therefore, a rigid binding of RAM cells to cache data is used to reduce search time. If we compare intermediate buffers that have the same volume, but different associativity, then the one with the larger one will work less quickly, but with significant specific efficiency.

Conclusion

As you can see, cached data allows your computer to act more quickly under certain conditions. But, alas, there are still quite a lot of aspects that can be worked on for a long time.

Did you like the article? Share with friends: